1. Field of the Invention
The present invention relates to a logic circuit, especially to a controlling circuit and the corresponding method for controlling an operating clock and/or the driving voltage of a logic circuit.
2. Description of the Prior Art
When a computer is running a complicated program or executing bloat-ware (i.e., big software), sometimes it is necessary to adjust the operating frequency of a logic circuit of the computer, a CPU of the computer especially. When the system load of the computer increases, overclocking of the CPU can be enabled, so the operating frequency of the operating clock is increased to handle the extra system load of the computer. On the other hand, when the system load of the computer decreases, overclocking of the CPU can be disabled, so the operating frequency is decreased to save power.
Please refer to FIG. 1. FIG. 1 shows the system load of the computer and the operating frequency of the CPU, where overclocking of the CPU is originally disabled at an initial time point corresponding to system start-up. As shown in FIG. 1, the system load increases and exceeds a predetermined threshold L1 at the time point t1. At this moment, overclocking of the CPU is enabled so the operating frequency of the CPU starts to rise, where the increment of the operating frequency of the CPU is Δf1. Afterward, the system load decreases. When the system load falls below the predetermined threshold L1 at the time point t2, overclocking is disabled and the operating frequency of the CPU returns to its initial value.
FIG. 2 shows the system load of the computer and the operating frequency of the CPU, where overclocking of the CPU is originally enabled, conversely. As shown in FIG. 2, the system load decreases and falls below a predetermined threshold L2 at the time point t3. At this moment, overclocking of the CPU is disabled so the operating frequency of the CPU starts to fall, where the decrement of the operating frequency of the CPU is Δf2. Afterward, the system load increases. When the system load rises above the predetermined threshold L2 at the time point t4, overclocking is enabled and the operating frequency of the CPU increases to its initial value. Some of those skilled in the art might identify the situations shown in FIG. 2 with enabling underclocking of the CPU at the time point t3 and disabling underclocking of the CPU at the time point t4, respectively.
According to the related art, regarding the case of FIG. 1, it is suggested that while the computer is booting up, the driving voltage inputted into the CPU can be an increased voltage level higher than a normal voltage level that is originally utilized in the case of FIG. 1, in order to satisfy the extra power requirement inside the CPU due to enabling overclocking, where the increased voltage level is not changed until the computer is shut down. However, applying the increased voltage level as the driving voltage is energy inefficient since overclocking might not be enabled all the time. In addition, applying the increased voltage level as the driving voltage usually leads to an extra amount of the increment of the system load, causing the system load idling above the predetermined threshold L1 and therefore causing failure of the threshold detection at the time point t2 mentioned above. That is, by utilizing the predetermined threshold L1 to detect the system load, failing to trigger the decrease of the operating frequency of the CPU at the time point t2 may occur.
On the other hand, regarding the case of FIG. 2, enabling underclocking without applying a decreased voltage level (which is lower than a normal voltage level that is originally utilized in the case of FIG. 2) as the driving voltage is not considered to be real energy efficient since the power saved by merely enabling underclocking (without utilizing the decreased voltage level) is minor.